With serial-bus speeds in the gigahertz range, designers of chips and boards that communicate with and over these buses often incorporate equalizers at the bus interface. Equalizers, essentially ...
The CAS-1000-I2C is a combined bus analyzer, exerciser, debugger, tester, and programmer for monitoring and testing devices and systems incorporating one or more I2C buses. You can use the instrument ...
GE’s RAR-USB is designed for debugging, simulation, monitoring and analyzing bus traffic and data recording of ARINC 429 and 717 data bus protocols. Photo: GE Intelligent Platforms [Avionics Magazine ...
Designed for PCI, PMC and CompactPCI architectures with full PCI-X support, the Vanguard Networked Bus Analyzers can be used to debug, test and validate next-generation platforms. Packing a state ...
NIJMEGEN, The Netherlands--(BUSINESS WIRE)--DapTechnology, a world-leading supplier of advanced IEEE-1394 protocol analyzers and solutions to the aerospace, defense, industrial, automotive and ...
Logic analyzers have long been the tool of choice for debugging complex timing and finding elusive functional problems. For parallel bus architectures, they offer time-correlated analysis of hundreds ...
In the context of nowadays SOCs, on-chip busses have evolved from pure router to smart and clever IPs able to make better usage of the bus throughput. To do so, some control features have been added, ...
Kelly Larson, John Dickol and Kari O’Brien, MediaTek Wireless, Inc. Performance verification of system bus fabrics is an increasingly complex problem. The bus fabrics themselves are growing in ...
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